The present invention relates to a field effect transistor having a gate electrode with a multilayered structure of silicon and copper, and a method of manufacturing the field effect transistor.
In recent years, further shrinkage in feature size of LSIs has been studied to increase the performance and degree of integration. For such shrinkage in feature size, the resistance of the gate electrode of a field effect transistor must be decreased to attain high performance. For this purpose, use of a two-layered structure of a metal and polysilicon for a gate electrode has been examined.
A gate electrode having a two-layered structure of polysilicon and copper has been proposed because of the low electrical resistance and better workability or chemical stability than that of gold or silver.
The conventional field effect transistor will be described. As shown in FIG. 6, first, a lower gate electrode 1403 of polysilicon is formed on a silicon substrate 1401 via a gate insulating film 1402. An upper gate electrode 1405 of copper is formed on the lower gate electrode 1403 via a barrier film 1404 of, e.g., titanium nitride. A barrier film 1406 of, e.g., titanium nitride is formed on the upper gate electrode 1405. The lower gate electrode 1403 and upper gate electrode 1405 form the gate electrode of the transistor.
A side wall 1407 of silicon oxide is formed to cover the side surface of the gate electrode. A lightly doped impurity region 1408 is formed in the silicon substrate 1401 under the side wall 1407. The silicon substrate 1401 has a source 1409 and drain 1410 which sandwich the lightly doped impurity region 1408.
The gate electrode comprising the lightly doped impurity region 1408, source 1409, drain 1410, gate insulating film 1402, and the gate electrode (comprising lower gate electrode 1403 and upper gate electrode 1405) form a field effect transistor having an LDD structure. This LDD structure suppresses the single channel effect.
This transistor is covered with an interlayer insulating film 1411 of silicon oxide. A gate electrode interconnection 1412 and source electrode interconnection 1413 formed from, e.g., aluminum are formed on the interlayer insulating film 1411. The gate electrode interconnection 1412 is connected to the upper gate electrode 1405 via the barrier film 1406 by a plug 1414 in the through hole formed in the interlayer insulating film 1411. The plug 1414 is formed from tungsten. A barrier film 1414a of, e.g., titanium nitride is formed on the side and bottom surfaces of the plug 1414.
The source electrode interconnection 1413 is connected to the source 1409 by a plug 1415 in the contact hole formed in the interlayer insulating film 1411. The plug 1415 is also formed from tungsten. A barrier film 1415a of, e.g., titanium nitride is formed on the side and button surfaces of the plug 1415.
Barrier films 1412a and 1413a of, e.g., titanium nitride are formed on the gate electrode interconnection 1412 and source electrode interconnection 1413, respectively. A protective insulating film 1416 is formed on the interlayer insulating film 1411 to cover the interconnections such as the gate electrode interconnection 1412 and source electrode interconnection 1413.
As described above, when the gate electrode has a two-layered structure of polysilicon and copper to reduce the resistance, the upper electrode 1405 of copper has the barrier films 1404 and 1406 on the lower and upper surfaces to suppress diffusion of copper to the lower polysilicon layer or upper metal interconnection formed from copper.
However, copper is diffused into the silicon oxide film and therefore diffused through the side wall 1407 and interlayer insulating film 1411, which are formed from silicon oxide. When copper is diffused to the silicon substrate 1401, a junction leakage current is generated, the ON current of the transistor is decreased, or the threshold value varies. When copper is diffused to the upper interconnection layer, a leakage current between the interconnection is generated.
It is therefore a principal object of the present invention to allow use of copper for the gate electrode of a field effect transistor without degrading the characteristics of the transistor.
In order to achieve the above object, according to the present invention, there is provided a field effect transistor comprising a lower gate electrode formed from silicon on a silicon substrate via a gate insulating film, an upper gate electrode formed from copper above the lower gate electrode, a first barrier film having a conductivity capable of supplying to the lower gate electrode a current enough to drive a channel portion and formed to cover a lower surface of the upper gate electrode and impede diffusion of copper, a second barrier film having a lower end in contact with the first barrier film and formed to cover side surfaces of the upper gate electrode and impede diffusion of copper, a third barrier film having an end portion in contact with the second barrier film and formed to cover an upper surface of the upper gate electrode and impede diffusion of copper, and a source and drain formed in the silicon substrate to sandwich a region under the lower gate electrode.